The detection and prevention of software security threats are significant concerns among various individuals and corporations connected through data protocols. They relied on exclusive security firewalls, virus scans, and solutions that usually are not scalable to advance national security objectives.
Open Source Security solutions now make it possible to create resilient solutions. The OpenCL data entry flow for the Field Programmable Gate Array (FPGA) design enables a designer to use open source solutions like the Suricata Intrusion Detection and stimulate their operation using the built-in hardware correspondence of FPGAs.
Intrusion detection systems are hidden intellect auspices in computer networks that scan every data set transferred through the network. They inspect for any indications of various cyberattacks about which they know.
The amount of data passed through the network increases with the increase in internet speed. The intrusion detection systems have evolved into huge racks and stacks of servers to keep pace with the increasing data passing through the networks. The energy expenses of the organizations that rely on them for protection have rolled up.
The researchers at Carnegie Mellon University’s CyLab have developed the fastest-ever open-source intrusion detection system called Pigasus, that achieves speeds of 100 gigabits per second using a single server to address this issue. Now five processors in a single server are sufficient to do what earlier required 100-700 processor cores and a whole rack of devices.
This intrusion system uses 38 times less power using an FPGA instead of hundreds of processing cores to perform the same work, saving a large amount of energy.
The researchers have employed a field-programmable gate array (FPGA), an integrated circuit for users to write code and customize, hence field-programmable. The researchers programmed the FPGA to be tailored for intrusion detection’s sole job and wrote substantially efficient and faster algorithms that can’t run on traditional processors.
When installed in a network, an average of 95 percent of data packs are processed independently by the FPGA. The other five percent is passed on to central processing units when it becomes overwhelming. Therefore it uses five processor cores in their system.
Related Paper: https://www.usenix.org/conference/osdi20/presentation/zhao-zhipeng